Dive into how Intel and AMD prepare new instructions for x86-x64 CPUs and what these changes mean for performance, security, and software support.
About a year ago, Intel and AMD formed the x86 EAG, which stands for “x86 Ecosystem Advisory Group.” This entity aims to define the future of the x86 architecture and to establish the principles and keys to follow to keep this architecture up to date and so that it remains competitive.
Intel and AMD’s joint work as founding members of the EAG x86 is already paying off. A new article published on AMD’s official website reveals that they have prepared an update with new instructions that will be added to strengthen the security layer of this architecture, and also to improve performance in vectors and arrays.
The new FRED statement, which stands for “Flexible Return and Event Delivery,” works as a new, more modern, and standardized interrupt model that will reduce latency and improve the reliability of the software.
Other instructions, such as AVX10 and ACE (Advanced Matrix Extensions for Matrix Multiplication), have been standardized and implemented throughout the instruction block, which means that from now on we have standard matrix multiplication acceleration and 512-bit vector extensions.
Intel and AMD Improve Security in x86-x64 CPUs
One of the most important parts of this instruction update is ChkTag, because of all that it means for memory security in an x86 architecture. This is a new set of x86 memory labeling instructions that helps detect common security errors in x86 memory, including buffer overflows and use after free. This detection is achieved by adding small tags to the memory and verifying them at the hardware level.
With these instructions, developers and compilers have precise control over memory accesses, which will be verified. This way, tools can enable protections where they matter most without the overhead of other types of software-based approaches.
For this reason, these instructions are very practical for hardening applications, kernels, hypervisors, and even firmware. ChkTag-compatible binaries can run on older processors that lack the hardware features, making them easier to implement.
These instructions will complement existing defense systems and mechanisms, such as shadow stacking and confidential computing. The full specification is expected to arrive later this year.
With the addition of new instructions and support for processing vectors, arrays, and other relatively new types of data, the complexity of the x86 architecture has reached such high levels that both Intel and AMD are rethinking the issue of backward compatibility with 16-bit and 32-bit instructions.
This issue led Intel to propose x86S, a project that intended to free itself from legacy support for 32-bit applications, but which ended up being canceled. This is due to the large number of applications, especially very popular games that have a 32-bit base and that would lose a lot of performance when running without native support.
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